[llvm] [AArch64] SimplifyDemandedBitsForTargetNode - add AArch64ISD::BICi handling (PR #76644)

[David Green via llvm-commits]

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@@ -796,4 +797,52 @@ TEST_F(AArch64SelectionDAGTest, computeKnownBits_extload_knownnegative) {
   EXPECT_EQ(Known.One, APInt(32, 0xfffffff0));
 }
 
+TEST_F(AArch64SelectionDAGTest,
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davemgreen wrote:

Thanks for adding these, they are useful for checking the produced results more precisely. Would it be possible to add something for the BICi changes too?

https://github.com/llvm/llvm-project/pull/76644