[llvm] [AArch64] SimplifyDemandedBitsForTargetNode - add AArch64ISD::BICi handling (PR #76644)

[David Green via llvm-commits]

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@@ -796,4 +797,52 @@ TEST_F(AArch64SelectionDAGTest, computeKnownBits_extload_knownnegative) {
   EXPECT_EQ(Known.One, APInt(32, 0xfffffff0));
 }
 
+TEST_F(AArch64SelectionDAGTest,
+       computeKnownBits_AVGFLOORU_AVGFLOORS_AVGCEILU_AVGCEILS) {
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davemgreen wrote:

Or these tests could be used to create a PR just for the AVG nodes part - to get that part in and reviewed, and the BIC can be rebase on top.

https://github.com/llvm/llvm-project/pull/76644