[llvm] [RISCV][GlobalISel] Represent RISC-V vector types using LLT scalable vectors; and legalize vectorized operations for G_ADD, G_SUB, G_AND, G_OR, and G_XOR opcodes (PR #71400)

[Michael Maitland via llvm-commits]

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@@ -19854,11 +19854,13 @@ unsigned RISCVTargetLowering::getCustomCtpopCost(EVT VT,
 }
 
 bool RISCVTargetLowering::fallBackToDAGISel(const Instruction &Inst) const {
-  // At the moment, the only scalable instruction GISel knows how to lower is
-  // ret with scalable argument.
 
-  if (Inst.getType()->isScalableTy())
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michaelmaitland wrote:

Maybe we should keep this, but place it after check added in this PR

https://github.com/llvm/llvm-project/pull/71400