[llvm] [RISCV][GlobalISel] Legalize G_ADD, G_SUB, G_AND, G_OR, G_XOR on RISC-V Vector Extension (PR #71400)

[Jiahan Xie via llvm-commits]

================
@@ -181,3 +181,330 @@ body:             |
     PseudoRET implicit $x10, implicit $x11, implicit $x12
 
 ...
+---
+name:  test_nxv1s8
+body:   |
----------------
jiahanxie353 wrote:

So like we'll have `test/CodeGen/RISCV/GlobalISel/legalizer/rvv/add.mir`:
```mir
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+v -run-pass=legalizer %s -o - | FileCheck %s
# RUN: llc -mtriple=riscv64 -mattr=+v -run-pass=legalizer %s -o - | FileCheck %s
---
name:  test_nxv1s8
body:   |
  bb.0.entry:
    ; CHECK-LABEL: name: test_nxv1s8
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v9
    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 1 x s8>) = G_ADD [[COPY]], [[COPY1]]
    ; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 1 x s8>)
    %0:_(<vscale x 1 x s8>) = COPY $v8
    %1:_(<vscale x 1 x s8>) = COPY $v9
    %2:_(<vscale x 1 x s8>) = G_ADD %0, %1
    PseudoRET implicit %2
...
---
name:  test_nxv2s8
body:   |
  bb.0.entry:
    ; CHECK-LABEL: name: test_nxv2s8
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v9
    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 2 x s8>) = G_ADD [[COPY]], [[COPY1]]
    ; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 2 x s8>)
    %0:_(<vscale x 2 x s8>) = COPY $v8
    %1:_(<vscale x 2 x s8>) = COPY $v9
    %2:_(<vscale x 2 x s8>) = G_ADD %0, %1
    PseudoRET implicit %2
...
more tests
```
?

https://github.com/llvm/llvm-project/pull/71400