[PATCH] D159533: [DAG] getNode() - fold (zext (trunc x)) -> x iff the upper bits are known zero - add SRL support

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

@jrbyrnes shouldn't we land the AMDGPU changes separately first? Or would it all be dead code without the rest of this patch?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D159533/new/

https://reviews.llvm.org/D159533