[llvm] [DAGCombiner][RISCV] Prefer to sext i32 non-negative values (PR #65984)

[Yingwei Zheng via llvm-commits]

dtcxzyw wrote:

> InstCombine does the same thing. 

I think you mean ISel. https://github.com/llvm/llvm-project/blob/231aa0f2120552b474bf86d5ff6721a6c555fdc3/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp#L6072

> Do we need a reverse transform to turn zext into sext explicitly? Or perhaps an isel pattern?

It is unsafe to turn `zext` into `sext`. Why not just prevent tuning `zext` into `sext`?


https://github.com/llvm/llvm-project/pull/65984