[llvm] [DAGCombiner][RISCV] Prefer to sext i32 non-negative values (PR #65984)

[Craig Topper via llvm-commits]

topperc wrote:

InstCombine does the same thing. Do we need a reverse transform to turn zext into sext explicitly? Or perhaps an isel pattern?

https://github.com/llvm/llvm-project/pull/65984