[PATCH] D156444: [llvm][RISCV][IR] Zext flag in IR for RISC-V

[Nikita Popov via Phabricator via llvm-commits]

nikic added a comment.

This is still missing LangRef changes.

I think you should also drop everything here that is related to supporting zext constant expressions. These will be removed in the near future, and I don't think it makes sense to add nneg support for them just to drop them again.



================
Comment at: llvm/lib/Bitcode/flags.ll:30
+  br label %second
+}
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This test should not be in the lib/ directory.


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Comment at: llvm/lib/IR/Instructions.cpp:3768
+           SrcEC == DstEC && SrcScalarBitSize < DstScalarBitSize; 
+  case Instruction::SExt: 
     return SrcTy->isIntOrIntVectorTy() && DstTy->isIntOrIntVectorTy() &&
----------------
Spurious white space changes.


Repository:
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  https://reviews.llvm.org/D156444/new/

https://reviews.llvm.org/D156444