[PATCH] D156444: [llvm][RISCV][IR] Zext flag in IR for RISC-V

[Panagiotis K via Phabricator via llvm-commits]

karouzakisp updated this revision to Diff 554252.
karouzakisp added a comment.

Removed redudant whitespaces.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156444/new/

https://reviews.llvm.org/D156444

Files:
  llvm/include/llvm/AsmParser/LLParser.h
  llvm/include/llvm/AsmParser/LLToken.h
  llvm/include/llvm/Bitcode/LLVMBitCodes.h
  llvm/include/llvm/IR/Constants.h
  llvm/include/llvm/IR/Instruction.h
  llvm/include/llvm/IR/Operator.h
  llvm/lib/AsmParser/LLLexer.cpp
  llvm/lib/AsmParser/LLParser.cpp
  llvm/lib/Bitcode/Reader/BitcodeReader.cpp
  llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
  llvm/lib/IR/AsmWriter.cpp
  llvm/lib/IR/Constants.cpp
  llvm/lib/IR/Instruction.cpp
  llvm/lib/IR/Operator.cpp
  llvm/test/Assembler/flags.ll
  llvm/test/Bitcode/constantsTest.3.2.ll
  llvm/test/Bitcode/flags.ll

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