[PATCH] D157458: [X86][AMX] Fix virtual register traversing in case of GlobalIsel
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 9 07:04:30 PDT 2023
pengfei added inline comments.
================
Comment at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:675
/// 2. The machine function has not completely been through the
- /// instruction selection process.
+ /// instruction selection process or selected using GlobalISel.
/// None of this condition is possible without GlobalISel for now.
----------------
pengfei wrote:
> Is GlobalISel also a instruction selection process?
I got your point. I think it's better to list as 3 conditions:
```
2. MIR selected using GlobalISel.
3. The machine function has ..
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D157458/new/
https://reviews.llvm.org/D157458
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