[PATCH] D157458: [X86][AMX] Fix virtual register traversing in case of GlobalIsel

[Quentin Colombet via Phabricator via llvm-commits]

qcolombet requested changes to this revision.
qcolombet added a comment.
This revision now requires changes to proceed.





================
Comment at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:675
   /// 2. The machine function has not completely been through the
-  ///    instruction selection process.
+  ///    instruction selection process or selected using GlobalISel.
   /// None of this condition is possible without GlobalISel for now.
----------------
pengfei wrote:
> pengfei wrote:
> > Is GlobalISel also a instruction selection process?
> I got your point. I think it's better to list as 3 conditions:
> ```
> 2. MIR selected using GlobalISel.
> 3. The machine function has ..
> ```
GlobalISel is an instruction selection process.
The current sentences make sense the way they are, I think.


================
Comment at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:677
   /// None of this condition is possible without GlobalISel for now.
-  /// In other words, if GlobalISel is not used or if the query happens after
+  /// In other words, if GlobalISel is not used and if the query happens after
   /// the select pass, using getRegClass is safe.
----------------
pengfei wrote:
> pengfei wrote:
> > My understanding the `or` is correct, it looks to me like `if (!GlobalISel || AfterISel)`
> Oh, I think and makes sense here. Sorry..
The sentence was correct :).
What this means is either :
- `GlobalISel` is not used, i.e., we go through `SelectionDAG` and then when we hit `MachineInstr` then `getRegClass` does what you want, or
- `GlobalISel` is used but  when you went all the way through the `InstructionSelection` pass in GlobalISel, then using `getRegClass` is also safe.


================
Comment at: llvm/test/CodeGen/X86/AMX/amx-fastpreconfig-gisel.mir:2
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
+# RUN: llc -mtriple=x86_64-- -run-pass=fastpretileconfig -o - %s | FileCheck %s
+
----------------
1. Unless you pass `-global-isel=1` GlobalISel doesn't run I believe for X86.
2. X86FastPreTileConfig runs only at O0. My guess is you're seeing an issue with FastISel.

Could you do a print-after-all with your failure (starting back at LLVM IR level) and see where the regclass is not properly set?
It doesn't look like a GlobalISel issue to me.
Put differently, you shouldn't see any null regclass after ISel (GISel or SDISel) period.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157458/new/

https://reviews.llvm.org/D157458