[llvm] 0d05992 - [AArch64] Regenerate fpround mir tests. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 8 01:24:10 PDT 2023
Author: David Green
Date: 2023-08-08T09:24:05+01:00
New Revision: 0d0599249a39cc568a38310032e42d2800638a50
URL: https://github.com/llvm/llvm-project/commit/0d0599249a39cc568a38310032e42d2800638a50
DIFF: https://github.com/llvm/llvm-project/commit/0d0599249a39cc568a38310032e42d2800638a50.diff
LOG: [AArch64] Regenerate fpround mir tests. NFC
Added:
Modified:
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ceil.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-frint.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-round.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-trunc.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-nearbyint.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ceil.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ceil.mir
index 982bd24c77ca63..7d6ef45a972f77 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ceil.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ceil.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=arm64-unknown-unknown -global-isel -O0 -mattr=-fullfp16 -run-pass=legalizer %s -o - | FileCheck %s
--- |
@@ -20,34 +21,39 @@ registers:
body: |
bb.1 (%ir-block.0):
liveins: $q0
- ; CHECK-LABEL: name: test_v8f16.ceil
+ ; CHECK-LABEL: name: test_v8f16.ceil
+ ; CHECK: liveins: $q0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
+ ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>)
+ ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
+ ; CHECK-NEXT: [[FCEIL:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT]]
+ ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL]](s32)
+ ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
+ ; CHECK-NEXT: [[FCEIL1:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT1]]
+ ; CHECK-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL1]](s32)
+ ; CHECK-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
+ ; CHECK-NEXT: [[FCEIL2:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT2]]
+ ; CHECK-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL2]](s32)
+ ; CHECK-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
+ ; CHECK-NEXT: [[FCEIL3:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT3]]
+ ; CHECK-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL3]](s32)
+ ; CHECK-NEXT: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16)
+ ; CHECK-NEXT: [[FCEIL4:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT4]]
+ ; CHECK-NEXT: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL4]](s32)
+ ; CHECK-NEXT: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16)
+ ; CHECK-NEXT: [[FCEIL5:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT5]]
+ ; CHECK-NEXT: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL5]](s32)
+ ; CHECK-NEXT: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16)
+ ; CHECK-NEXT: [[FCEIL6:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT6]]
+ ; CHECK-NEXT: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL6]](s32)
+ ; CHECK-NEXT: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16)
+ ; CHECK-NEXT: [[FCEIL7:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT7]]
+ ; CHECK-NEXT: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL7]](s32)
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16)
+ ; CHECK-NEXT: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>)
+ ; CHECK-NEXT: RET_ReallyLR implicit $q0
%0:_(<8 x s16>) = COPY $q0
- ; CHECK: %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16) = G_UNMERGE_VALUES %{{[0-9]+}}(<8 x s16>)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(<8 x s16>) = G_BUILD_VECTOR %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16)
%1:_(<8 x s16>) = G_FCEIL %0
$q0 = COPY %1(<8 x s16>)
RET_ReallyLR implicit $q0
@@ -63,22 +69,27 @@ registers:
body: |
bb.1 (%ir-block.0):
liveins: $d0
- ; CHECK-LABEL: name: test_v4f16.ceil
+ ; CHECK-LABEL: name: test_v4f16.ceil
+ ; CHECK: liveins: $d0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+ ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
+ ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
+ ; CHECK-NEXT: [[FCEIL:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT]]
+ ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL]](s32)
+ ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
+ ; CHECK-NEXT: [[FCEIL1:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT1]]
+ ; CHECK-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL1]](s32)
+ ; CHECK-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
+ ; CHECK-NEXT: [[FCEIL2:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT2]]
+ ; CHECK-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL2]](s32)
+ ; CHECK-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
+ ; CHECK-NEXT: [[FCEIL3:%[0-9]+]]:_(s32) = G_FCEIL [[FPEXT3]]
+ ; CHECK-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FCEIL3]](s32)
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16)
+ ; CHECK-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>)
+ ; CHECK-NEXT: RET_ReallyLR implicit $d0
%0:_(<4 x s16>) = COPY $d0
- ; CHECK: %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16), %{{[0-9]+}}:_(s16) = G_UNMERGE_VALUES %{{[0-9]+}}(<4 x s16>)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FPEXT %{{[0-9]+}}(s16)
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FCEIL %{{[0-9]+}}
- ; CHECK: %{{[0-9]+}}:_(s16) = G_FPTRUNC %{{[0-9]+}}(s32)
- ; CHECK: %{{[0-9]+}}:_(<4 x s16>) = G_BUILD_VECTOR %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16), %{{[0-9]+}}(s16)
%1:_(<4 x s16>) = G_FCEIL %0
$d0 = COPY %1(<4 x s16>)
RET_ReallyLR implicit $d0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-frint.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-frint.mir
index def81870ff40c9..a923e9af61a7a0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-frint.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-frint.mir
@@ -27,16 +27,19 @@ body: |
; NOFP16-LABEL: name: test_f32.rint
; NOFP16: liveins: $s0
- ; NOFP16: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
- ; NOFP16: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[COPY]]
- ; NOFP16: $s0 = COPY [[FRINT]](s32)
- ; NOFP16: RET_ReallyLR implicit $s0
+ ; NOFP16-NEXT: {{ $}}
+ ; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
+ ; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[COPY]]
+ ; NOFP16-NEXT: $s0 = COPY [[FRINT]](s32)
+ ; NOFP16-NEXT: RET_ReallyLR implicit $s0
+ ;
; FP16-LABEL: name: test_f32.rint
; FP16: liveins: $s0
- ; FP16: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
- ; FP16: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[COPY]]
- ; FP16: $s0 = COPY [[FRINT]](s32)
- ; FP16: RET_ReallyLR implicit $s0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
+ ; FP16-NEXT: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[COPY]]
+ ; FP16-NEXT: $s0 = COPY [[FRINT]](s32)
+ ; FP16-NEXT: RET_ReallyLR implicit $s0
%0:_(s32) = COPY $s0
%1:_(s32) = G_FRINT %0
$s0 = COPY %1(s32)
@@ -54,16 +57,19 @@ body: |
; NOFP16-LABEL: name: test_f64.rint
; NOFP16: liveins: $d0
- ; NOFP16: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
- ; NOFP16: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]]
- ; NOFP16: $d0 = COPY [[FRINT]](s64)
- ; NOFP16: RET_ReallyLR implicit $d0
+ ; NOFP16-NEXT: {{ $}}
+ ; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
+ ; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]]
+ ; NOFP16-NEXT: $d0 = COPY [[FRINT]](s64)
+ ; NOFP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; FP16-LABEL: name: test_f64.rint
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
- ; FP16: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]]
- ; FP16: $d0 = COPY [[FRINT]](s64)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
+ ; FP16-NEXT: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[FRINT]](s64)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(s64) = COPY $d0
%1:_(s64) = G_FRINT %0
$d0 = COPY %1(s64)
@@ -81,16 +87,19 @@ body: |
; NOFP16-LABEL: name: test_v4f32.rint
; NOFP16: liveins: $q0
- ; NOFP16: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; NOFP16: [[FRINT:%[0-9]+]]:_(<4 x s32>) = G_FRINT [[COPY]]
- ; NOFP16: $q0 = COPY [[FRINT]](<4 x s32>)
- ; NOFP16: RET_ReallyLR implicit $q0
+ ; NOFP16-NEXT: {{ $}}
+ ; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
+ ; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(<4 x s32>) = G_FRINT [[COPY]]
+ ; NOFP16-NEXT: $q0 = COPY [[FRINT]](<4 x s32>)
+ ; NOFP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; FP16-LABEL: name: test_v4f32.rint
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; FP16: [[FRINT:%[0-9]+]]:_(<4 x s32>) = G_FRINT [[COPY]]
- ; FP16: $q0 = COPY [[FRINT]](<4 x s32>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
+ ; FP16-NEXT: [[FRINT:%[0-9]+]]:_(<4 x s32>) = G_FRINT [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[FRINT]](<4 x s32>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<4 x s32>) = COPY $q0
%1:_(<4 x s32>) = G_FRINT %0
$q0 = COPY %1(<4 x s32>)
@@ -108,16 +117,19 @@ body: |
; NOFP16-LABEL: name: test_v2f64.rint
; NOFP16: liveins: $q0
- ; NOFP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; NOFP16: [[FRINT:%[0-9]+]]:_(<2 x s64>) = G_FRINT [[COPY]]
- ; NOFP16: $q0 = COPY [[FRINT]](<2 x s64>)
- ; NOFP16: RET_ReallyLR implicit $q0
+ ; NOFP16-NEXT: {{ $}}
+ ; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
+ ; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(<2 x s64>) = G_FRINT [[COPY]]
+ ; NOFP16-NEXT: $q0 = COPY [[FRINT]](<2 x s64>)
+ ; NOFP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; FP16-LABEL: name: test_v2f64.rint
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; FP16: [[FRINT:%[0-9]+]]:_(<2 x s64>) = G_FRINT [[COPY]]
- ; FP16: $q0 = COPY [[FRINT]](<2 x s64>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
+ ; FP16-NEXT: [[FRINT:%[0-9]+]]:_(<2 x s64>) = G_FRINT [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[FRINT]](<2 x s64>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<2 x s64>) = COPY $q0
%1:_(<2 x s64>) = G_FRINT %0
$q0 = COPY %1(<2 x s64>)
@@ -135,29 +147,32 @@ body: |
; NOFP16-LABEL: name: test_v4f16.rint
; NOFP16: liveins: $d0
- ; NOFP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
- ; NOFP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
- ; NOFP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
- ; NOFP16: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT]]
- ; NOFP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT]](s32)
- ; NOFP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
- ; NOFP16: [[FRINT1:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT1]]
- ; NOFP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT1]](s32)
- ; NOFP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
- ; NOFP16: [[FRINT2:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT2]]
- ; NOFP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT2]](s32)
- ; NOFP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
- ; NOFP16: [[FRINT3:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT3]]
- ; NOFP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT3]](s32)
- ; NOFP16: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16)
- ; NOFP16: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>)
- ; NOFP16: RET_ReallyLR implicit $d0
+ ; NOFP16-NEXT: {{ $}}
+ ; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+ ; NOFP16-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
+ ; NOFP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
+ ; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT]]
+ ; NOFP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT]](s32)
+ ; NOFP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
+ ; NOFP16-NEXT: [[FRINT1:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT1]]
+ ; NOFP16-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT1]](s32)
+ ; NOFP16-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
+ ; NOFP16-NEXT: [[FRINT2:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT2]]
+ ; NOFP16-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT2]](s32)
+ ; NOFP16-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
+ ; NOFP16-NEXT: [[FRINT3:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT3]]
+ ; NOFP16-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT3]](s32)
+ ; NOFP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16)
+ ; NOFP16-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>)
+ ; NOFP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; FP16-LABEL: name: test_v4f16.rint
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
- ; FP16: [[FRINT:%[0-9]+]]:_(<4 x s16>) = G_FRINT [[COPY]]
- ; FP16: $d0 = COPY [[FRINT]](<4 x s16>)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+ ; FP16-NEXT: [[FRINT:%[0-9]+]]:_(<4 x s16>) = G_FRINT [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[FRINT]](<4 x s16>)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(<4 x s16>) = COPY $d0
%1:_(<4 x s16>) = G_FRINT %0
$d0 = COPY %1(<4 x s16>)
@@ -175,41 +190,44 @@ body: |
; NOFP16-LABEL: name: test_v8f16.rint
; NOFP16: liveins: $q0
- ; NOFP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
- ; NOFP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>)
- ; NOFP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
- ; NOFP16: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT]]
- ; NOFP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT]](s32)
- ; NOFP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
- ; NOFP16: [[FRINT1:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT1]]
- ; NOFP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT1]](s32)
- ; NOFP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
- ; NOFP16: [[FRINT2:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT2]]
- ; NOFP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT2]](s32)
- ; NOFP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
- ; NOFP16: [[FRINT3:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT3]]
- ; NOFP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT3]](s32)
- ; NOFP16: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16)
- ; NOFP16: [[FRINT4:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT4]]
- ; NOFP16: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT4]](s32)
- ; NOFP16: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16)
- ; NOFP16: [[FRINT5:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT5]]
- ; NOFP16: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT5]](s32)
- ; NOFP16: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16)
- ; NOFP16: [[FRINT6:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT6]]
- ; NOFP16: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT6]](s32)
- ; NOFP16: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16)
- ; NOFP16: [[FRINT7:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT7]]
- ; NOFP16: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT7]](s32)
- ; NOFP16: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16)
- ; NOFP16: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>)
- ; NOFP16: RET_ReallyLR implicit $q0
+ ; NOFP16-NEXT: {{ $}}
+ ; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
+ ; NOFP16-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>)
+ ; NOFP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
+ ; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT]]
+ ; NOFP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT]](s32)
+ ; NOFP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
+ ; NOFP16-NEXT: [[FRINT1:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT1]]
+ ; NOFP16-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT1]](s32)
+ ; NOFP16-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
+ ; NOFP16-NEXT: [[FRINT2:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT2]]
+ ; NOFP16-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT2]](s32)
+ ; NOFP16-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
+ ; NOFP16-NEXT: [[FRINT3:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT3]]
+ ; NOFP16-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT3]](s32)
+ ; NOFP16-NEXT: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16)
+ ; NOFP16-NEXT: [[FRINT4:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT4]]
+ ; NOFP16-NEXT: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT4]](s32)
+ ; NOFP16-NEXT: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16)
+ ; NOFP16-NEXT: [[FRINT5:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT5]]
+ ; NOFP16-NEXT: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT5]](s32)
+ ; NOFP16-NEXT: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16)
+ ; NOFP16-NEXT: [[FRINT6:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT6]]
+ ; NOFP16-NEXT: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT6]](s32)
+ ; NOFP16-NEXT: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16)
+ ; NOFP16-NEXT: [[FRINT7:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT7]]
+ ; NOFP16-NEXT: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT7]](s32)
+ ; NOFP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16)
+ ; NOFP16-NEXT: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>)
+ ; NOFP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; FP16-LABEL: name: test_v8f16.rint
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
- ; FP16: [[FRINT:%[0-9]+]]:_(<8 x s16>) = G_FRINT [[COPY]]
- ; FP16: $q0 = COPY [[FRINT]](<8 x s16>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
+ ; FP16-NEXT: [[FRINT:%[0-9]+]]:_(<8 x s16>) = G_FRINT [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[FRINT]](<8 x s16>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<8 x s16>) = COPY $q0
%1:_(<8 x s16>) = G_FRINT %0
$q0 = COPY %1(<8 x s16>)
@@ -227,16 +245,19 @@ body: |
; NOFP16-LABEL: name: test_v2f32.rint
; NOFP16: liveins: $d0
- ; NOFP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; NOFP16: [[FRINT:%[0-9]+]]:_(<2 x s32>) = G_FRINT [[COPY]]
- ; NOFP16: $d0 = COPY [[FRINT]](<2 x s32>)
- ; NOFP16: RET_ReallyLR implicit $d0
+ ; NOFP16-NEXT: {{ $}}
+ ; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
+ ; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(<2 x s32>) = G_FRINT [[COPY]]
+ ; NOFP16-NEXT: $d0 = COPY [[FRINT]](<2 x s32>)
+ ; NOFP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; FP16-LABEL: name: test_v2f32.rint
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; FP16: [[FRINT:%[0-9]+]]:_(<2 x s32>) = G_FRINT [[COPY]]
- ; FP16: $d0 = COPY [[FRINT]](<2 x s32>)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
+ ; FP16-NEXT: [[FRINT:%[0-9]+]]:_(<2 x s32>) = G_FRINT [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[FRINT]](<2 x s32>)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(<2 x s32>) = COPY $d0
%1:_(<2 x s32>) = G_FRINT %0
$d0 = COPY %1(<2 x s32>)
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-round.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-round.mir
index 91842a70158b94..7b8ccdb5e54509 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-round.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-round.mir
@@ -15,18 +15,21 @@ body: |
; NO-FP16-LABEL: name: test_f16.round
; NO-FP16: liveins: $h0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT]]
- ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND]](s32)
- ; NO-FP16: $h0 = COPY [[FPTRUNC]](s16)
- ; NO-FP16: RET_ReallyLR implicit $h0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT]]
+ ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND]](s32)
+ ; NO-FP16-NEXT: $h0 = COPY [[FPTRUNC]](s16)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $h0
+ ;
; FP16-LABEL: name: test_f16.round
; FP16: liveins: $h0
- ; FP16: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s16) = G_INTRINSIC_ROUND [[COPY]]
- ; FP16: $h0 = COPY [[INTRINSIC_ROUND]](s16)
- ; FP16: RET_ReallyLR implicit $h0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s16) = G_INTRINSIC_ROUND [[COPY]]
+ ; FP16-NEXT: $h0 = COPY [[INTRINSIC_ROUND]](s16)
+ ; FP16-NEXT: RET_ReallyLR implicit $h0
%0:_(s16) = COPY $h0
%1:_(s16) = G_INTRINSIC_ROUND %0
$h0 = COPY %1(s16)
@@ -44,16 +47,19 @@ body: |
; NO-FP16-LABEL: name: test_f32.round
; NO-FP16: liveins: $s0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
- ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[COPY]]
- ; NO-FP16: $s0 = COPY [[INTRINSIC_ROUND]](s32)
- ; NO-FP16: RET_ReallyLR implicit $s0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[COPY]]
+ ; NO-FP16-NEXT: $s0 = COPY [[INTRINSIC_ROUND]](s32)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $s0
+ ;
; FP16-LABEL: name: test_f32.round
; FP16: liveins: $s0
- ; FP16: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
- ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[COPY]]
- ; FP16: $s0 = COPY [[INTRINSIC_ROUND]](s32)
- ; FP16: RET_ReallyLR implicit $s0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
+ ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[COPY]]
+ ; FP16-NEXT: $s0 = COPY [[INTRINSIC_ROUND]](s32)
+ ; FP16-NEXT: RET_ReallyLR implicit $s0
%0:_(s32) = COPY $s0
%1:_(s32) = G_INTRINSIC_ROUND %0
$s0 = COPY %1(s32)
@@ -71,16 +77,19 @@ body: |
; NO-FP16-LABEL: name: test_f64.round
; NO-FP16: liveins: $d0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
- ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s64) = G_INTRINSIC_ROUND [[COPY]]
- ; NO-FP16: $d0 = COPY [[INTRINSIC_ROUND]](s64)
- ; NO-FP16: RET_ReallyLR implicit $d0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s64) = G_INTRINSIC_ROUND [[COPY]]
+ ; NO-FP16-NEXT: $d0 = COPY [[INTRINSIC_ROUND]](s64)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; FP16-LABEL: name: test_f64.round
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
- ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s64) = G_INTRINSIC_ROUND [[COPY]]
- ; FP16: $d0 = COPY [[INTRINSIC_ROUND]](s64)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
+ ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s64) = G_INTRINSIC_ROUND [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[INTRINSIC_ROUND]](s64)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(s64) = COPY $d0
%1:_(s64) = G_INTRINSIC_ROUND %0
$d0 = COPY %1(s64)
@@ -98,41 +107,44 @@ body: |
; NO-FP16-LABEL: name: test_v8f16.round
; NO-FP16: liveins: $q0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
- ; NO-FP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>)
- ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT]]
- ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND]](s32)
- ; NO-FP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND1:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT1]]
- ; NO-FP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND1]](s32)
- ; NO-FP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND2:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT2]]
- ; NO-FP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND2]](s32)
- ; NO-FP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND3:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT3]]
- ; NO-FP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND3]](s32)
- ; NO-FP16: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND4:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT4]]
- ; NO-FP16: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND4]](s32)
- ; NO-FP16: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND5:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT5]]
- ; NO-FP16: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND5]](s32)
- ; NO-FP16: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND6:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT6]]
- ; NO-FP16: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND6]](s32)
- ; NO-FP16: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND7:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT7]]
- ; NO-FP16: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND7]](s32)
- ; NO-FP16: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16)
- ; NO-FP16: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>)
- ; NO-FP16: RET_ReallyLR implicit $q0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
+ ; NO-FP16-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>)
+ ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT]]
+ ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND]](s32)
+ ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND1:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT1]]
+ ; NO-FP16-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND1]](s32)
+ ; NO-FP16-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND2:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT2]]
+ ; NO-FP16-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND2]](s32)
+ ; NO-FP16-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND3:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT3]]
+ ; NO-FP16-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND3]](s32)
+ ; NO-FP16-NEXT: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND4:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT4]]
+ ; NO-FP16-NEXT: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND4]](s32)
+ ; NO-FP16-NEXT: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND5:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT5]]
+ ; NO-FP16-NEXT: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND5]](s32)
+ ; NO-FP16-NEXT: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND6:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT6]]
+ ; NO-FP16-NEXT: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND6]](s32)
+ ; NO-FP16-NEXT: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND7:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT7]]
+ ; NO-FP16-NEXT: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND7]](s32)
+ ; NO-FP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16)
+ ; NO-FP16-NEXT: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; FP16-LABEL: name: test_v8f16.round
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
- ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<8 x s16>) = G_INTRINSIC_ROUND [[COPY]]
- ; FP16: $q0 = COPY [[INTRINSIC_ROUND]](<8 x s16>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
+ ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<8 x s16>) = G_INTRINSIC_ROUND [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[INTRINSIC_ROUND]](<8 x s16>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<8 x s16>) = COPY $q0
%1:_(<8 x s16>) = G_INTRINSIC_ROUND %0
$q0 = COPY %1(<8 x s16>)
@@ -153,29 +165,32 @@ body: |
; NO-FP16-LABEL: name: test_v4f16.round
; NO-FP16: liveins: $d0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
- ; NO-FP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
- ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT]]
- ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND]](s32)
- ; NO-FP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND1:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT1]]
- ; NO-FP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND1]](s32)
- ; NO-FP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND2:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT2]]
- ; NO-FP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND2]](s32)
- ; NO-FP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
- ; NO-FP16: [[INTRINSIC_ROUND3:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT3]]
- ; NO-FP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND3]](s32)
- ; NO-FP16: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16)
- ; NO-FP16: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>)
- ; NO-FP16: RET_ReallyLR implicit $d0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+ ; NO-FP16-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
+ ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT]]
+ ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND]](s32)
+ ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND1:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT1]]
+ ; NO-FP16-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND1]](s32)
+ ; NO-FP16-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND2:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT2]]
+ ; NO-FP16-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND2]](s32)
+ ; NO-FP16-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND3:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT3]]
+ ; NO-FP16-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND3]](s32)
+ ; NO-FP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16)
+ ; NO-FP16-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; FP16-LABEL: name: test_v4f16.round
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
- ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s16>) = G_INTRINSIC_ROUND [[COPY]]
- ; FP16: $d0 = COPY [[INTRINSIC_ROUND]](<4 x s16>)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+ ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s16>) = G_INTRINSIC_ROUND [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[INTRINSIC_ROUND]](<4 x s16>)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(<4 x s16>) = COPY $d0
%1:_(<4 x s16>) = G_INTRINSIC_ROUND %0
$d0 = COPY %1(<4 x s16>)
@@ -196,16 +211,19 @@ body: |
; NO-FP16-LABEL: name: test_v2f32.round
; NO-FP16: liveins: $d0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_ROUND [[COPY]]
- ; NO-FP16: $d0 = COPY [[INTRINSIC_ROUND]](<2 x s32>)
- ; NO-FP16: RET_ReallyLR implicit $d0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_ROUND [[COPY]]
+ ; NO-FP16-NEXT: $d0 = COPY [[INTRINSIC_ROUND]](<2 x s32>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; FP16-LABEL: name: test_v2f32.round
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_ROUND [[COPY]]
- ; FP16: $d0 = COPY [[INTRINSIC_ROUND]](<2 x s32>)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
+ ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_ROUND [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[INTRINSIC_ROUND]](<2 x s32>)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(<2 x s32>) = COPY $d0
%1:_(<2 x s32>) = G_INTRINSIC_ROUND %0
$d0 = COPY %1(<2 x s32>)
@@ -226,16 +244,19 @@ body: |
; NO-FP16-LABEL: name: test_v4f32.round
; NO-FP16: liveins: $q0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[COPY]]
- ; NO-FP16: $q0 = COPY [[INTRINSIC_ROUND]](<4 x s32>)
- ; NO-FP16: RET_ReallyLR implicit $q0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[COPY]]
+ ; NO-FP16-NEXT: $q0 = COPY [[INTRINSIC_ROUND]](<4 x s32>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; FP16-LABEL: name: test_v4f32.round
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[COPY]]
- ; FP16: $q0 = COPY [[INTRINSIC_ROUND]](<4 x s32>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
+ ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[INTRINSIC_ROUND]](<4 x s32>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<4 x s32>) = COPY $q0
%1:_(<4 x s32>) = G_INTRINSIC_ROUND %0
$q0 = COPY %1(<4 x s32>)
@@ -256,16 +277,19 @@ body: |
; NO-FP16-LABEL: name: test_v2f64.round
; NO-FP16: liveins: $q0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_ROUND [[COPY]]
- ; NO-FP16: $q0 = COPY [[INTRINSIC_ROUND]](<2 x s64>)
- ; NO-FP16: RET_ReallyLR implicit $q0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
+ ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_ROUND [[COPY]]
+ ; NO-FP16-NEXT: $q0 = COPY [[INTRINSIC_ROUND]](<2 x s64>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; FP16-LABEL: name: test_v2f64.round
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_ROUND [[COPY]]
- ; FP16: $q0 = COPY [[INTRINSIC_ROUND]](<2 x s64>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
+ ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_ROUND [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[INTRINSIC_ROUND]](<2 x s64>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<2 x s64>) = COPY $q0
%1:_(<2 x s64>) = G_INTRINSIC_ROUND %0
$q0 = COPY %1(<2 x s64>)
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-trunc.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-trunc.mir
index b6a98a94d0f2c4..3a506a3f13a4dc 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-trunc.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-trunc.mir
@@ -12,18 +12,21 @@ body: |
liveins: $h0
; NO-FP16-LABEL: name: test_f16.intrinsic_trunc
; NO-FP16: liveins: $h0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]]
- ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32)
- ; NO-FP16: $h0 = COPY [[FPTRUNC]](s16)
- ; NO-FP16: RET_ReallyLR implicit $h0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]]
+ ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32)
+ ; NO-FP16-NEXT: $h0 = COPY [[FPTRUNC]](s16)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $h0
+ ;
; FP16-LABEL: name: test_f16.intrinsic_trunc
; FP16: liveins: $h0
- ; FP16: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s16) = G_INTRINSIC_TRUNC [[COPY]]
- ; FP16: $h0 = COPY [[INTRINSIC_TRUNC]](s16)
- ; FP16: RET_ReallyLR implicit $h0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s16) = G_INTRINSIC_TRUNC [[COPY]]
+ ; FP16-NEXT: $h0 = COPY [[INTRINSIC_TRUNC]](s16)
+ ; FP16-NEXT: RET_ReallyLR implicit $h0
%0:_(s16) = COPY $h0
%1:_(s16) = G_INTRINSIC_TRUNC %0
$h0 = COPY %1(s16)
@@ -41,29 +44,32 @@ body: |
; NO-FP16-LABEL: name: test_v4f16.intrinsic_trunc
; NO-FP16: liveins: $d0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
- ; NO-FP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
- ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]]
- ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32)
- ; NO-FP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT1]]
- ; NO-FP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC1]](s32)
- ; NO-FP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC2:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT2]]
- ; NO-FP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC2]](s32)
- ; NO-FP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC3:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT3]]
- ; NO-FP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC3]](s32)
- ; NO-FP16: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16)
- ; NO-FP16: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>)
- ; NO-FP16: RET_ReallyLR implicit $d0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+ ; NO-FP16-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
+ ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]]
+ ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32)
+ ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT1]]
+ ; NO-FP16-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC1]](s32)
+ ; NO-FP16-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC2:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT2]]
+ ; NO-FP16-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC2]](s32)
+ ; NO-FP16-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC3:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT3]]
+ ; NO-FP16-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC3]](s32)
+ ; NO-FP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16)
+ ; NO-FP16-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; FP16-LABEL: name: test_v4f16.intrinsic_trunc
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
- ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<4 x s16>) = G_INTRINSIC_TRUNC [[COPY]]
- ; FP16: $d0 = COPY [[INTRINSIC_TRUNC]](<4 x s16>)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+ ; FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<4 x s16>) = G_INTRINSIC_TRUNC [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[INTRINSIC_TRUNC]](<4 x s16>)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(<4 x s16>) = COPY $d0
%1:_(<4 x s16>) = G_INTRINSIC_TRUNC %0
$d0 = COPY %1(<4 x s16>)
@@ -81,41 +87,44 @@ body: |
; NO-FP16-LABEL: name: test_v8f16.intrinsic_trunc
; NO-FP16: liveins: $q0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
- ; NO-FP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>)
- ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]]
- ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32)
- ; NO-FP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT1]]
- ; NO-FP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC1]](s32)
- ; NO-FP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC2:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT2]]
- ; NO-FP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC2]](s32)
- ; NO-FP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC3:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT3]]
- ; NO-FP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC3]](s32)
- ; NO-FP16: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC4:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT4]]
- ; NO-FP16: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC4]](s32)
- ; NO-FP16: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC5:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT5]]
- ; NO-FP16: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC5]](s32)
- ; NO-FP16: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC6:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT6]]
- ; NO-FP16: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC6]](s32)
- ; NO-FP16: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16)
- ; NO-FP16: [[INTRINSIC_TRUNC7:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT7]]
- ; NO-FP16: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC7]](s32)
- ; NO-FP16: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16)
- ; NO-FP16: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>)
- ; NO-FP16: RET_ReallyLR implicit $q0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
+ ; NO-FP16-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>)
+ ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]]
+ ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32)
+ ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT1]]
+ ; NO-FP16-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC1]](s32)
+ ; NO-FP16-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC2:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT2]]
+ ; NO-FP16-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC2]](s32)
+ ; NO-FP16-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC3:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT3]]
+ ; NO-FP16-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC3]](s32)
+ ; NO-FP16-NEXT: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC4:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT4]]
+ ; NO-FP16-NEXT: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC4]](s32)
+ ; NO-FP16-NEXT: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC5:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT5]]
+ ; NO-FP16-NEXT: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC5]](s32)
+ ; NO-FP16-NEXT: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC6:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT6]]
+ ; NO-FP16-NEXT: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC6]](s32)
+ ; NO-FP16-NEXT: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16)
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC7:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT7]]
+ ; NO-FP16-NEXT: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC7]](s32)
+ ; NO-FP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16)
+ ; NO-FP16-NEXT: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; FP16-LABEL: name: test_v8f16.intrinsic_trunc
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
- ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<8 x s16>) = G_INTRINSIC_TRUNC [[COPY]]
- ; FP16: $q0 = COPY [[INTRINSIC_TRUNC]](<8 x s16>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
+ ; FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<8 x s16>) = G_INTRINSIC_TRUNC [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[INTRINSIC_TRUNC]](<8 x s16>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<8 x s16>) = COPY $q0
%1:_(<8 x s16>) = G_INTRINSIC_TRUNC %0
$q0 = COPY %1(<8 x s16>)
@@ -133,16 +142,19 @@ body: |
; NO-FP16-LABEL: name: test_v2f32.intrinsic_trunc
; NO-FP16: liveins: $d0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_TRUNC [[COPY]]
- ; NO-FP16: $d0 = COPY [[INTRINSIC_TRUNC]](<2 x s32>)
- ; NO-FP16: RET_ReallyLR implicit $d0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_TRUNC [[COPY]]
+ ; NO-FP16-NEXT: $d0 = COPY [[INTRINSIC_TRUNC]](<2 x s32>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; FP16-LABEL: name: test_v2f32.intrinsic_trunc
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_TRUNC [[COPY]]
- ; FP16: $d0 = COPY [[INTRINSIC_TRUNC]](<2 x s32>)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
+ ; FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_TRUNC [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[INTRINSIC_TRUNC]](<2 x s32>)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(<2 x s32>) = COPY $d0
%1:_(<2 x s32>) = G_INTRINSIC_TRUNC %0
$d0 = COPY %1(<2 x s32>)
@@ -160,16 +172,19 @@ body: |
; NO-FP16-LABEL: name: test_v4f32.intrinsic_trunc
; NO-FP16: liveins: $q0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_TRUNC [[COPY]]
- ; NO-FP16: $q0 = COPY [[INTRINSIC_TRUNC]](<4 x s32>)
- ; NO-FP16: RET_ReallyLR implicit $q0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_TRUNC [[COPY]]
+ ; NO-FP16-NEXT: $q0 = COPY [[INTRINSIC_TRUNC]](<4 x s32>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; FP16-LABEL: name: test_v4f32.intrinsic_trunc
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_TRUNC [[COPY]]
- ; FP16: $q0 = COPY [[INTRINSIC_TRUNC]](<4 x s32>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
+ ; FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_TRUNC [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[INTRINSIC_TRUNC]](<4 x s32>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<4 x s32>) = COPY $q0
%1:_(<4 x s32>) = G_INTRINSIC_TRUNC %0
$q0 = COPY %1(<4 x s32>)
@@ -187,16 +202,19 @@ body: |
; NO-FP16-LABEL: name: test_v2f64.intrinsic_trunc
; NO-FP16: liveins: $q0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; NO-FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_TRUNC [[COPY]]
- ; NO-FP16: $q0 = COPY [[INTRINSIC_TRUNC]](<2 x s64>)
- ; NO-FP16: RET_ReallyLR implicit $q0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
+ ; NO-FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_TRUNC [[COPY]]
+ ; NO-FP16-NEXT: $q0 = COPY [[INTRINSIC_TRUNC]](<2 x s64>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; FP16-LABEL: name: test_v2f64.intrinsic_trunc
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; FP16: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_TRUNC [[COPY]]
- ; FP16: $q0 = COPY [[INTRINSIC_TRUNC]](<2 x s64>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
+ ; FP16-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_TRUNC [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[INTRINSIC_TRUNC]](<2 x s64>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<2 x s64>) = COPY $q0
%1:_(<2 x s64>) = G_INTRINSIC_TRUNC %0
$q0 = COPY %1(<2 x s64>)
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-nearbyint.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-nearbyint.mir
index 8d30134884411f..3eac322e138fa6 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-nearbyint.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-nearbyint.mir
@@ -14,29 +14,32 @@ body: |
; FP16-LABEL: name: test_v4f16.nearbyint
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
- ; FP16: [[FNEARBYINT:%[0-9]+]]:_(<4 x s16>) = G_FNEARBYINT [[COPY]]
- ; FP16: $d0 = COPY [[FNEARBYINT]](<4 x s16>)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+ ; FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(<4 x s16>) = G_FNEARBYINT [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[FNEARBYINT]](<4 x s16>)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; NO-FP16-LABEL: name: test_v4f16.nearbyint
; NO-FP16: liveins: $d0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
- ; NO-FP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
- ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
- ; NO-FP16: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT]]
- ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT]](s32)
- ; NO-FP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
- ; NO-FP16: [[FNEARBYINT1:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT1]]
- ; NO-FP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT1]](s32)
- ; NO-FP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
- ; NO-FP16: [[FNEARBYINT2:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT2]]
- ; NO-FP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT2]](s32)
- ; NO-FP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
- ; NO-FP16: [[FNEARBYINT3:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT3]]
- ; NO-FP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT3]](s32)
- ; NO-FP16: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16)
- ; NO-FP16: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>)
- ; NO-FP16: RET_ReallyLR implicit $d0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+ ; NO-FP16-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
+ ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT]]
+ ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT]](s32)
+ ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT1:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT1]]
+ ; NO-FP16-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT1]](s32)
+ ; NO-FP16-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT2:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT2]]
+ ; NO-FP16-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT2]](s32)
+ ; NO-FP16-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT3:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT3]]
+ ; NO-FP16-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT3]](s32)
+ ; NO-FP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16)
+ ; NO-FP16-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(<4 x s16>) = COPY $d0
%1:_(<4 x s16>) = G_FNEARBYINT %0
$d0 = COPY %1(<4 x s16>)
@@ -54,41 +57,44 @@ body: |
; FP16-LABEL: name: test_v8f16.nearbyint
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
- ; FP16: [[FNEARBYINT:%[0-9]+]]:_(<8 x s16>) = G_FNEARBYINT [[COPY]]
- ; FP16: $q0 = COPY [[FNEARBYINT]](<8 x s16>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
+ ; FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(<8 x s16>) = G_FNEARBYINT [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[FNEARBYINT]](<8 x s16>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; NO-FP16-LABEL: name: test_v8f16.nearbyint
; NO-FP16: liveins: $q0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
- ; NO-FP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>)
- ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
- ; NO-FP16: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT]]
- ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT]](s32)
- ; NO-FP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
- ; NO-FP16: [[FNEARBYINT1:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT1]]
- ; NO-FP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT1]](s32)
- ; NO-FP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
- ; NO-FP16: [[FNEARBYINT2:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT2]]
- ; NO-FP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT2]](s32)
- ; NO-FP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
- ; NO-FP16: [[FNEARBYINT3:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT3]]
- ; NO-FP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT3]](s32)
- ; NO-FP16: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16)
- ; NO-FP16: [[FNEARBYINT4:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT4]]
- ; NO-FP16: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT4]](s32)
- ; NO-FP16: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16)
- ; NO-FP16: [[FNEARBYINT5:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT5]]
- ; NO-FP16: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT5]](s32)
- ; NO-FP16: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16)
- ; NO-FP16: [[FNEARBYINT6:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT6]]
- ; NO-FP16: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT6]](s32)
- ; NO-FP16: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16)
- ; NO-FP16: [[FNEARBYINT7:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT7]]
- ; NO-FP16: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT7]](s32)
- ; NO-FP16: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16)
- ; NO-FP16: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>)
- ; NO-FP16: RET_ReallyLR implicit $q0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
+ ; NO-FP16-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>)
+ ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT]]
+ ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT]](s32)
+ ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT1:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT1]]
+ ; NO-FP16-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT1]](s32)
+ ; NO-FP16-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT2:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT2]]
+ ; NO-FP16-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT2]](s32)
+ ; NO-FP16-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT3:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT3]]
+ ; NO-FP16-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT3]](s32)
+ ; NO-FP16-NEXT: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT4:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT4]]
+ ; NO-FP16-NEXT: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT4]](s32)
+ ; NO-FP16-NEXT: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT5:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT5]]
+ ; NO-FP16-NEXT: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT5]](s32)
+ ; NO-FP16-NEXT: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT6:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT6]]
+ ; NO-FP16-NEXT: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT6]](s32)
+ ; NO-FP16-NEXT: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT7:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT7]]
+ ; NO-FP16-NEXT: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT7]](s32)
+ ; NO-FP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16)
+ ; NO-FP16-NEXT: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<8 x s16>) = COPY $q0
%1:_(<8 x s16>) = G_FNEARBYINT %0
$q0 = COPY %1(<8 x s16>)
@@ -106,16 +112,19 @@ body: |
; FP16-LABEL: name: test_v2f32.nearbyint
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; FP16: [[FNEARBYINT:%[0-9]+]]:_(<2 x s32>) = G_FNEARBYINT [[COPY]]
- ; FP16: $d0 = COPY [[FNEARBYINT]](<2 x s32>)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
+ ; FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(<2 x s32>) = G_FNEARBYINT [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[FNEARBYINT]](<2 x s32>)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; NO-FP16-LABEL: name: test_v2f32.nearbyint
; NO-FP16: liveins: $d0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; NO-FP16: [[FNEARBYINT:%[0-9]+]]:_(<2 x s32>) = G_FNEARBYINT [[COPY]]
- ; NO-FP16: $d0 = COPY [[FNEARBYINT]](<2 x s32>)
- ; NO-FP16: RET_ReallyLR implicit $d0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
+ ; NO-FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(<2 x s32>) = G_FNEARBYINT [[COPY]]
+ ; NO-FP16-NEXT: $d0 = COPY [[FNEARBYINT]](<2 x s32>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(<2 x s32>) = COPY $d0
%1:_(<2 x s32>) = G_FNEARBYINT %0
$d0 = COPY %1(<2 x s32>)
@@ -133,16 +142,19 @@ body: |
; FP16-LABEL: name: test_v2f64.nearbyint
; FP16: liveins: $q0
- ; FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; FP16: [[FNEARBYINT:%[0-9]+]]:_(<2 x s64>) = G_FNEARBYINT [[COPY]]
- ; FP16: $q0 = COPY [[FNEARBYINT]](<2 x s64>)
- ; FP16: RET_ReallyLR implicit $q0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
+ ; FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(<2 x s64>) = G_FNEARBYINT [[COPY]]
+ ; FP16-NEXT: $q0 = COPY [[FNEARBYINT]](<2 x s64>)
+ ; FP16-NEXT: RET_ReallyLR implicit $q0
+ ;
; NO-FP16-LABEL: name: test_v2f64.nearbyint
; NO-FP16: liveins: $q0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; NO-FP16: [[FNEARBYINT:%[0-9]+]]:_(<2 x s64>) = G_FNEARBYINT [[COPY]]
- ; NO-FP16: $q0 = COPY [[FNEARBYINT]](<2 x s64>)
- ; NO-FP16: RET_ReallyLR implicit $q0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
+ ; NO-FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(<2 x s64>) = G_FNEARBYINT [[COPY]]
+ ; NO-FP16-NEXT: $q0 = COPY [[FNEARBYINT]](<2 x s64>)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $q0
%0:_(<2 x s64>) = COPY $q0
%1:_(<2 x s64>) = G_FNEARBYINT %0
$q0 = COPY %1(<2 x s64>)
@@ -160,16 +172,19 @@ body: |
; FP16-LABEL: name: test_f32.nearbyint
; FP16: liveins: $s0
- ; FP16: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
- ; FP16: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[COPY]]
- ; FP16: $s0 = COPY [[FNEARBYINT]](s32)
- ; FP16: RET_ReallyLR implicit $s0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
+ ; FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[COPY]]
+ ; FP16-NEXT: $s0 = COPY [[FNEARBYINT]](s32)
+ ; FP16-NEXT: RET_ReallyLR implicit $s0
+ ;
; NO-FP16-LABEL: name: test_f32.nearbyint
; NO-FP16: liveins: $s0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
- ; NO-FP16: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[COPY]]
- ; NO-FP16: $s0 = COPY [[FNEARBYINT]](s32)
- ; NO-FP16: RET_ReallyLR implicit $s0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
+ ; NO-FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[COPY]]
+ ; NO-FP16-NEXT: $s0 = COPY [[FNEARBYINT]](s32)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $s0
%0:_(s32) = COPY $s0
%1:_(s32) = G_FNEARBYINT %0
$s0 = COPY %1(s32)
@@ -187,16 +202,19 @@ body: |
; FP16-LABEL: name: test_f64.nearbyint
; FP16: liveins: $d0
- ; FP16: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
- ; FP16: [[FNEARBYINT:%[0-9]+]]:_(s64) = G_FNEARBYINT [[COPY]]
- ; FP16: $d0 = COPY [[FNEARBYINT]](s64)
- ; FP16: RET_ReallyLR implicit $d0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
+ ; FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(s64) = G_FNEARBYINT [[COPY]]
+ ; FP16-NEXT: $d0 = COPY [[FNEARBYINT]](s64)
+ ; FP16-NEXT: RET_ReallyLR implicit $d0
+ ;
; NO-FP16-LABEL: name: test_f64.nearbyint
; NO-FP16: liveins: $d0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
- ; NO-FP16: [[FNEARBYINT:%[0-9]+]]:_(s64) = G_FNEARBYINT [[COPY]]
- ; NO-FP16: $d0 = COPY [[FNEARBYINT]](s64)
- ; NO-FP16: RET_ReallyLR implicit $d0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
+ ; NO-FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(s64) = G_FNEARBYINT [[COPY]]
+ ; NO-FP16-NEXT: $d0 = COPY [[FNEARBYINT]](s64)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $d0
%0:_(s64) = COPY $d0
%1:_(s64) = G_FNEARBYINT %0
$d0 = COPY %1(s64)
@@ -214,18 +232,21 @@ body: |
; FP16-LABEL: name: test_f16.nearbyint
; FP16: liveins: $h0
- ; FP16: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; FP16: [[FNEARBYINT:%[0-9]+]]:_(s16) = G_FNEARBYINT [[COPY]]
- ; FP16: $h0 = COPY [[FNEARBYINT]](s16)
- ; FP16: RET_ReallyLR implicit $h0
+ ; FP16-NEXT: {{ $}}
+ ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(s16) = G_FNEARBYINT [[COPY]]
+ ; FP16-NEXT: $h0 = COPY [[FNEARBYINT]](s16)
+ ; FP16-NEXT: RET_ReallyLR implicit $h0
+ ;
; NO-FP16-LABEL: name: test_f16.nearbyint
; NO-FP16: liveins: $h0
- ; NO-FP16: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16)
- ; NO-FP16: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT]]
- ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT]](s32)
- ; NO-FP16: $h0 = COPY [[FPTRUNC]](s16)
- ; NO-FP16: RET_ReallyLR implicit $h0
+ ; NO-FP16-NEXT: {{ $}}
+ ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16)
+ ; NO-FP16-NEXT: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT]]
+ ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT]](s32)
+ ; NO-FP16-NEXT: $h0 = COPY [[FPTRUNC]](s16)
+ ; NO-FP16-NEXT: RET_ReallyLR implicit $h0
%0:_(s16) = COPY $h0
%1:_(s16) = G_FNEARBYINT %0
$h0 = COPY %1(s16)
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