[PATCH] D155216: [RISCV] Add initial SDNode patterns for unary zvbb instructions

[Luke Lau via Phabricator via llvm-commits]

luke added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td:189
+      def "_V_" # m.MX : VPseudoUnaryNoMask<m.vrclass, m.vrclass>;
+      def "_V_" # m.MX # "_MASK" : VPseudoUnaryMask<m.vrclass, m.vrclass>,
+                                   RISCVMaskedPseudo</*MaskOpIdx*/ 2>;
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The mask pseudo isn't currently tested, but will hopefully be used by the VP nodes later. I can leave it out of this patch for now if people would prefer


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155216/new/

https://reviews.llvm.org/D155216