[PATCH] D154136: [RISCV] Add SEW to RISCVInversePseudoTable

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp:34
   uint8_t VLMul;
+  uint8_t SEW;
 };
----------------
I dont' think this changes the table size. There was an 8 bit hole here.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrFormats.td:222
+  // SEW = 0 is used to denote that the RVInst is not SEW specific.
+  // TODO: make field smaller by using bit<2> where 0b00 = E8, 0b01=E16,
+  // 0b10=E32, 0b11=E64.
----------------
nit: bits<2> not bit<2>


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Comment at: llvm/lib/Target/RISCV/RISCVInstrFormats.td:224
+  // 0b10=E32, 0b11=E64.
+  bits<7> SEW = 0;
 }
----------------
Can this be in the `RISCVVPseudo` class?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154136/new/

https://reviews.llvm.org/D154136