[PATCH] D154136: [RISCV] Add SEW to RISCVInversePseudoTable
Michael Maitland via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 29 12:46:53 PDT 2023
michaelmaitland created this revision.
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Now that scheduler resources are split by SEW for some instructions,
add the ability to map (BaseInstr, LMUL, SEW) -> Pseudo. For
BaseInstrs that are not split by SEW, 0 is the default key.
This keeps the number of Pseudos the same and increases the
RISCVInversePseudoTable by `NumberOfPseudos * sizeof(SEW)`. This
table is only imported when llvm-mca is built, so if you don't build
llvm-mca, the size of PseudoTables does not change.
This change will be used in a future patch by llvm-mca to determine
the schedule class based off of SEW data, now that the scheduler
now accounts for SEW for some instructions.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D154136
Files:
llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
llvm/lib/Target/RISCV/RISCVInstrFormats.td
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
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