[PATCH] D153517: [AMDGPU] ISel for amdgpu_cs_chain[_preserve] functions

[Diana Picus via Phabricator via llvm-commits]

rovka added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp:91
+    // right after the arguments.
+    StackPtrOffsetReg = AMDGPU::SGPR105;
+
----------------
arsenm wrote:
> This is an odd choice of value and it doesn't exist on all subtargets
I tried setting the SP in `finalizeLowering` using basically [[ https://github.com/llvm/llvm-project/blob/5cd16e2cb7207a70a61d1221464b17dcaf3c7f29/llvm/lib/Target/AMDGPU/SIISelLowering.cpp#L2380 | this snippet ]], but it blew up for Global ISel (I think because of some issue with the liveins). I figured I should ask here before going too far down that rabbit hole - does that sound like the right approach, or is there a better place to handle the SP? I'm guessing there are other things I could prioritize before fixing this, but do let me know if you think otherwise.


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  https://reviews.llvm.org/D153517/new/

https://reviews.llvm.org/D153517