[PATCH] D151449: [RISCV] Add DAG combine for CTTZ in the case of input 0

Mikhail Gudim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 8 13:49:04 PDT 2023


mgudim added a comment.

see `DAGCombiner::SimplifySelectCC` for the logic of determining which operand is what. That code also handles `CTLZ` and case of reversed operands.



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:11427
+  SDValue Op2 = N->getOperand(1);
+  SDValue Op3 = N->getOperand(2);
+  SDValue CTTZ;
----------------
More descriptive names of operands would be better here.  For example, `Op1` is `Cond`,  `Op2` is `ValOnZero`, etc


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:11442
+
+  // The `true` branch should be constant `0`.
+  if (!isNullConstant(Op2))
----------------
what if select is reversed?


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  https://reviews.llvm.org/D151449/new/

https://reviews.llvm.org/D151449



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