[llvm] 53a7c25 - [AVR][NFC][test] Suppement a test of the pseudo instruction RORBRd

Ben Shi via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 4 08:19:39 PDT 2023


Author: Ben Shi
Date: 2023-06-04T23:19:21+08:00
New Revision: 53a7c254e493499fd2007c9335e4c0d3ee96981c

URL: https://github.com/llvm/llvm-project/commit/53a7c254e493499fd2007c9335e4c0d3ee96981c
DIFF: https://github.com/llvm/llvm-project/commit/53a7c254e493499fd2007c9335e4c0d3ee96981c.diff

LOG: [AVR][NFC][test] Suppement a test of the pseudo instruction RORBRd

Reviewed By: aykevl, Patryk27

Differential Revision: https://reviews.llvm.org/D152087

Added: 
    llvm/test/CodeGen/AVR/pseudo/RORBrd.mir

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AVR/pseudo/RORBrd.mir b/llvm/test/CodeGen/AVR/pseudo/RORBrd.mir
new file mode 100644
index 0000000000000..d0f84b8a39f37
--- /dev/null
+++ b/llvm/test/CodeGen/AVR/pseudo/RORBrd.mir
@@ -0,0 +1,25 @@
+# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
+
+# This test checks the expansion of the 8-bit RORB (rotate) pseudo instruction.
+
+--- |
+  target triple = "avr--"
+  define void @test_rorbrd() {
+  entry:
+    ret void
+  }
+...
+
+---
+name:            test_rorbrd
+body: |
+  bb.0.entry:
+    liveins: $r14
+
+    ; CHECK-LABEL: test_rorbrd
+    ; CHECK:         BST $r14, 0, implicit-def $sreg
+    ; CHECK-NEXT:    $r14 = RORRd $r14, implicit-def $sreg, implicit $sreg
+    ; CHECK-NEXT:    $r14 = BLD $r14, 7, implicit $sreg
+
+    $r14 = RORBRd $r14, implicit-def $sreg
+...


        


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