[llvm] 54fd5cf - [RISCV] Fix typo in comment. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-05-12T09:31:08-07:00
New Revision: 54fd5cf926c56d255c4757af838edbe37e6ae5d9

URL: https://github.com/llvm/llvm-project/commit/54fd5cf926c56d255c4757af838edbe37e6ae5d9
DIFF: https://github.com/llvm/llvm-project/commit/54fd5cf926c56d255c4757af838edbe37e6ae5d9.diff

LOG: [RISCV] Fix typo in comment. NFC

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 9126bdf8b783..76c4a596e911 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3175,8 +3175,9 @@ bool RISCVDAGToDAGISel::doPeepholeMaskedRVV(SDNode *N) {
   unsigned Opc = IsTA ? I->UnmaskedPseudo : I->UnmaskedTUPseudo;
 
   // Check that we're dropping the mask operand and any policy operand
-  // when we transform to this unmasked pseudo. Additionally, if this insturtion
-  // is tail agnostic, the unmasked instruction should not have a merge op.
+  // when we transform to this unmasked pseudo. Additionally, if this
+  // instruction is tail agnostic, the unmasked instruction should not have a
+  // merge op.
   uint64_t TSFlags = TII.get(Opc).TSFlags;
   assert((IsTA != RISCVII::hasMergeOp(TSFlags)) &&
          RISCVII::hasDummyMaskOp(TSFlags) &&