[PATCH] D150286: [RISCV] Fold (select setcc, setcc, setcc) into and/or instructions

[Yingwei Zheng via Phabricator via llvm-commits]

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This patch folds `(select setcc, setcc, setcc)` into and/or instructions when truev/falsev is equal to or the inverse of condv.

(select x, x, y) -> x | y https://alive2.llvm.org/ce/z/36Ud3Z
(select !x, x, y) -> x & y https://alive2.llvm.org/ce/z/mYYoGF
(select x, y, x) -> x & y https://alive2.llvm.org/ce/z/MAZ--X
(select !x, y, x) -> x | y https://alive2.llvm.org/ce/z/ct7By5

It is the follow-up improvement of D150177 <https://reviews.llvm.org/D150177>, which optimizes the code of signed truncation check patterns without Zbb.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150286

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/forced-atomics.ll
  llvm/test/CodeGen/RISCV/fpclamptosat.ll
  llvm/test/CodeGen/RISCV/iabs.ll
  llvm/test/CodeGen/RISCV/lack-of-signed-truncation-check.ll
  llvm/test/CodeGen/RISCV/xaluo.ll

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