[PATCH] D149034: [M68k] Add instruction selection support for zext with PCD addressing

[Ian D. Scott via Phabricator via llvm-commits]

ids1024 added a comment.

In D149034#4291901 <https://reviews.llvm.org/D149034#4291901>, @glaubitz wrote:

> Thanks for your patch! I just gave it a try but I'm still running into this error when trying to build libcore:

In particular, this patch fixes compilation of `parse_long_mantissa`. That error message doesn't seem to involve PC-relative addressing so it wouldn't be impacted by this patch. It may be unrelated or a different issue with zero extension.

I think there are other issues related to this. Even if zero-extension doesn't support PCD addressing, it presumably should be able to load the value and zero extend it with more instructions.


Repository:
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  https://reviews.llvm.org/D149034/new/

https://reviews.llvm.org/D149034