[PATCH] D149034: [M68k] Add instruction selection support for zext with PCD addressing

[John Paul Adrian Glaubitz via Phabricator via llvm-commits]

glaubitz added a comment.

Thanks for your patch! I just gave it a try but I'm still running into this error when trying to build libcore:

  In function: _ZN4core3num7dec2flt6lemire13compute_float17h5485431827d3a879E
  error: could not compile `core`
  LLVM ERROR: Cannot select: t13: i32 = mul t12, t36
    t12: i32,ch = CopyFromReg t0, Register:i32 %27
      t11: i32 = Register %27
    t36: i32,ch = load<(load (s8) from %ir.70, !alias.scope !40, !noalias !45), zext from i8> t0, t2, undef:i32
      t2: i32,ch = CopyFromReg t0, Register:i32 %30
        t1: i32 = Register %30
      t4: i32 = undef
  In function: _ZN83_$LT$memchr..memmem..FindIter$u20$as$u20$core..iter..traits..iterator..Iterator$GT$4next17h404867d129058870E
  error: could not compile `memchr`
  rustc: /data/home/glaubitz/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:10477: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
  rustc exited with signal: 6 (SIGABRT) (core dumped)
  error: could not compile `rustc-demangle`

Do we need to change something else?


Repository:
  rG LLVM Github Monorepo

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