[PATCH] D149001: [InstSimplify] sdiv a (1 srem b) --> a
Zhu Siyuan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 23 03:33:08 PDT 2023
floatshadow updated this revision to Diff 516148.
floatshadow added a comment.
use `computeKnownBits()` to check if the divisor can only be zero or one.
another question is can this method replace the original pattern match like `match(Op1, m_One())`? I worry about the performance of `computeKnownBits()`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149001/new/
https://reviews.llvm.org/D149001
Files:
llvm/lib/Analysis/InstructionSimplify.cpp
llvm/test/Transforms/InstSimplify/div.ll
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