[PATCH] D149001: [InstSimplify] sdiv a (1 srem b) --> a

Zhu Siyuan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 23 07:56:25 PDT 2023


floatshadow added a comment.

@nikic  I checked PR51762 test in `Transforms/InstCombine/zext-or-icmp.ll`

  %lor.ext = zext i1 %spec.select57 to i32
  %t2 = load i32, ptr %d, align 4
  %conv15 = sext i16 %t1 to i32
  %cmp16 = icmp sge i32 %t2, %conv15
  %conv17 = zext i1 %cmp16 to i32
  %t3 = load i32, ptr %f, align 4
  %add = add nsw i32 %t3, %conv17
  store i32 %add, ptr %f, align 4
  %rem18 = srem i32 %lor.ext, %add
  %conv19 = zext i32 %rem18 to i64
  
  %div = udiv i64 %insert.insert41, %conv19
  %trunc33 = trunc i64 %div to i32
  store i32 %trunc33, ptr %d, align 8
  %r = icmp ult i64 %insert.insert41, %conv19
  call void @llvm.assume(i1 %r)

as %cond19 = zext (srem (zext i1) %add), %cond can only be zero or one
the main branch looks at llvm.assume, and deduce %insert.insert41 = 0, thus `store i32 %trunc33, ptr %d, align 8` becomes `store i32 0, ptr %d, align 8`
I do some trace which shows the call stack: simplifyUdiv --> isDivZero -> simplifyICmpWithDominatingAssume

as for current patch, it seems `udiv` will first enter `simplifyDivRem` which do the fold, replace %udiv with %insert.insert41 (done by computeKnownBits). 
later trunc replace %insert.insert41  with %insert.insert39: opt debug logs <https://paste.debian.net/1278205/>

  ADD DEFERRED:   %insert.insert41 = or i64 %insert.shift52, %insert.ext39
  IC: Mod =   %trunc33 = trunc i64 %insert.insert41 to i32
      New =   %trunc33 = trunc i64 %insert.ext39 to i32

thus  `store i32 %trunc33, ptr %d, align 8` becomes `store i32 %sroa38, ptr %d, align 8`

I am not sure what I should do now, alive2 tells me that the transforms seems correct https://alive2.llvm.org/ce/


Repository:
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