[PATCH] D148834: [RISCV][InsertVSETVLI] Avoid VL toggles for extractelement patterns

[Alex Bradbury via Phabricator via llvm-commits]

asb added a comment.

Left a very minor stylistic comment. LGTM for what it's worth, but this needs a review from someone more active in the RVV space.



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Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:815
+  switch (LMUL) {
+  default: break;
+  case LMUL_1: return true;
----------------
Would it be better to change this to case `LMUL_RESERVED: llvm_unreachable("reserved LMUL value")` so `-Wswitch` will pick up if the enumeration is expanded.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148834/new/

https://reviews.llvm.org/D148834