[PATCH] D147533: [AArch64][CodeGen][SME] Allow vectors large than hardware support to use SVE's load zero/sign-extend for fixed vectors

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 19 06:47:56 PDT 2023

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sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.

LGTM


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147533/new/

https://reviews.llvm.org/D147533

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