[PATCH] D147118: [ValueTracking] Use dominate tree to get dominate predecessor condtion

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n added a comment.

Can you be a little clearer about what cases we now cover that we didn't before?



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Comment at: llvm/lib/Analysis/DomConditionAnalysis.cpp:105
+
+  for (const auto &Cond : It->second) {
+    if (Cond.LHS == LHS && Cond.RHS == RHS)
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We have a vec of dominating conditions. Why are we only using the first one? The value of the this patch IIUC is that we should be able to get more conditions and more information, but returning the first one defeats that purpose.


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Comment at: llvm/test/Transforms/InstSimplify/domcondition.ll:219
 }
+
+define i32 @xor_simplify_by_dci(i32 %x, i32 %y, i1 %c) {
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Can you precommit tests so we can see diff this patch causes?


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  https://reviews.llvm.org/D147118/new/

https://reviews.llvm.org/D147118