[PATCH] D147118: [ValueTracking] Use dominate tree to get dominate predecessor condtion

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 added inline comments.


================
Comment at: llvm/lib/Analysis/DomConditionAnalysis.cpp:105
+
+  for (const auto &Cond : It->second) {
+    if (Cond.LHS == LHS && Cond.RHS == RHS)
----------------
goldstein.w.n wrote:
> We have a vec of dominating conditions. Why are we only using the first one? The value of the this patch IIUC is that we should be able to get more conditions and more information, but returning the first one defeats that purpose.
If we have many dominate conditions for the same LHS and RHS, we can actually merge them into one. So return the first one is enough. For example:


```
if (x >= y)
  if ( x == y)
      return x ^ y;

```
We only need to check the dominate condition `x == y`. For now we will have two elements in the vector `x > y`, `x == y`. 
Actually we just need the dominate condition `x==y` here. We can optimize this part in initialization later to make sure every `LHS cmp RHS` only have one element in the vector.
I can add a TODO in the code but the initialize cost is a already a little high now.


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  https://reviews.llvm.org/D147118/new/

https://reviews.llvm.org/D147118