[PATCH] D147934: [RISCV] Support LLVM IR intrinsics for XSfvcp extension.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td:228
+  let HasSEWOp = 1;
+  let HasDummyMask = 1;
+  let hasSideEffects = HasSideEffect;
----------------
Why do VCIX instruction have `HasDummyMask=1`? There's no mask operand in the MC instructions is there?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147934/new/

https://reviews.llvm.org/D147934