[PATCH] D147934: [RISCV] Support LLVM IR intrinsics for XSfvcp extension.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td:124
+class GetLMulLowerMX<string MX> {
+  string mx = !cond(!eq(MX, "MF8"): "mf8",
+                    !eq(MX, "MF4"): "mf4",
----------------
There's a !tolower operator in tablegen.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td:503
+      defm : VPatVC_XV<"fv", "F" # vti.SEW # "V", vti,
+                       GetFTypeInfo<vti.SEW>.Scalar,
+                       GetFTypeInfo<vti.SEW>.ScalarRegClass, payload1>;
----------------
Isn't there already a Scalar and ScalarRegClass field in vti?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D147934/new/

https://reviews.llvm.org/D147934