[PATCH] D147934: [RISCV] Support LLVM IR intrinsics for XSfvcp extension.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCVXsf.td:17
+                                [llvm_any_ty, llvm_anyint_ty]),
+                    !listconcat([IntrNoMem], !if(HasSE, [IntrHasSideEffects], []))>,
+          RISCVVIntrinsic {
----------------
4vtomat wrote:
> craig.topper wrote:
> > craig.topper wrote:
> > > Aren't we supposed to have ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>> for the immediate operands?
> > That's what is in our downstream. And we use llvm_i32_ty for those operands.
> You are right, we should have these properties, I've added and make them to XLenVT type instead of i32 type, so that we can skip scalar legalization in lowerVectorIntrinsicScalars.
`ImmArg` automatically skips scalar legalization so that wouldn’t have been an issue.

We can use XLenVT.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147934/new/

https://reviews.llvm.org/D147934