[PATCH] D148229: [DAGCombine][AArch64][CodeGen] Allow 2x bigger vectors than legal for mulh lowering and use SVE's mulh for fixed vector types.

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 13 08:28:19 PDT 2023

sdesmalen added inline comments.

Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:9918-9920
+  // Combine to mulh if mulh is legal/custom for the narrow type on the target
+  // and if the type is a vector and 2x bigger than hardware supports then we
+  // rely on legalization to split/combine the result. 
I guess your point here is that if the vector is too wide (i.e. it has too many elements), then we can rely on legalisation of the UMULH/SMULH to do splitting of the operation/vectors, and this is preferred over legalising the extends themselves. So rather than only testing if the operation is Legal/Custom for NarrowVT or it's halved type, we actually want to check this for any legalised type of NarrowVT. That means you can use `getTypeToTransformTo`, e.g.

  EVT TransformVT = TLI.getTypeToTransformTo(*DAG.getContext(), NarrowVT);
  if (!TLI.isOperationLegalOrCustom(Opc, TransformVT))
    return SDValue();



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