[PATCH] D148229: [DAGCombine][AArch64][CodeGen] Allow 2x bigger vectors than legal for mulh lowering and use SVE's mulh for fixed vector types.
Dinar Temirbulatov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 13 11:31:15 PDT 2023
dtemirbulatov updated this revision to Diff 513318.
dtemirbulatov marked 4 inline comments as done.
dtemirbulatov added a comment.
Herald added a subscriber: dmgreen.
Replaced to a transformable to the legal type for MULH operation instead of 2x size check.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148229/new/
https://reviews.llvm.org/D148229
Files:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll
llvm/test/CodeGen/Thumb2/mve-vmulh.ll
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