[PATCH] D147096: AMDGPU: Created a sub-register class for the return address operand in the tail call return instruction
Christudasan Devadasan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 7 04:12:02 PDT 2023
cdevadas added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:2490
+ if (!B.getMRI()->getRegClassOrNull(PCReg))
+ B.getMRI()->setRegClass(PCReg, &AMDGPU::SReg_64RegClass);
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Not sure this is the right thing to do. @foad can you review this?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D147096/new/
https://reviews.llvm.org/D147096
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