[PATCH] D147096: AMDGPU: Created a sub-register class for the return address operand in the tail call return instruction
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 7 15:38:41 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:2490
+ if (!B.getMRI()->getRegClassOrNull(PCReg))
+ B.getMRI()->setRegClass(PCReg, &AMDGPU::SReg_64RegClass);
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cdevadas wrote:
> Not sure this is the right thing to do. @foad can you review this?
Looking at the test diffs, I think we should introduce a copy to the correct register class when TCRETURN is inserted. If the G_GLOBAL_VALUE has other uses, it's over constrained
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D147096/new/
https://reviews.llvm.org/D147096
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