[PATCH] D147609: [RISCV] Use non-strided load if VL=1 for optimized zero stride loads

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM other than the suggestion of how to simplify `IsStrided` calculation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147609/new/

https://reviews.llvm.org/D147609