[PATCH] D147096: AMDGPU: Created a sub-register class for the return address operand in the tail call return instruction

[Changpeng Fang via Phabricator via llvm-commits]

cfang added a comment.

In D147096#4229261 <https://reviews.llvm.org/D147096#4229261>, @cdevadas wrote:

> What will happen to `getMinimalPhysRegClass` query for SGPR_64 registers?
> If this returns the new register class, ccr_sgpr_64, that's not the desired behavior.

getMinimalPhysRegClass should always return the minimal physical register class. I think CCR_SGPR_64
has all the properties of SGPR_64, so we won't have any issue for the (srcReg, RC) pair.


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