[PATCH] D147096: AMDGPU: Created a sub-register class for the return address operand in the tail call return instruction

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas added a comment.

What will happen to `getMinimalPhysRegClass` query for SGPR_64 registers?
If this returns the new register class, ccr_sgpr_64, that's not the desired behavior.


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https://reviews.llvm.org/D147096