[PATCH] D145315: AMDGPU: Fix missing MIR serialization for PSInputAddr/PSInputEnable

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:282
+  unsigned PSInputEnable = 0;
+
   SIMode Mode;
----------------
critson wrote:
> I don't understand this part of the diff, since this is how the header is already defined.
You’re probably confusing the actual MFI definition and the yaml mirror, which is what this is 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145315/new/

https://reviews.llvm.org/D145315