[PATCH] D145315: AMDGPU: Fix missing MIR serialization for PSInputAddr/PSInputEnable
Carl Ritson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 27 17:48:19 PDT 2023
critson accepted this revision.
critson added a comment.
This revision is now accepted and ready to land.
LGTM
================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:282
+ unsigned PSInputEnable = 0;
+
SIMode Mode;
----------------
arsenm wrote:
> critson wrote:
> > I don't understand this part of the diff, since this is how the header is already defined.
> You’re probably confusing the actual MFI definition and the yaml mirror, which is what this is
Correct, I had not appreciated there were two definitions with the same name in different namespaces.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D145315/new/
https://reviews.llvm.org/D145315
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