[PATCH] D146835: [RISCV] Enable usubo formation in CodeGenPrepare.

[Philip Reames via Phabricator via llvm-commits]

reames accepted this revision.
reames added a comment.
This revision is now accepted and ready to land.

LGTM w/comment



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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.h:496
                             bool MathUsed) const override {
     if (VT == MVT::i8 || VT == MVT::i16)
       return false;
----------------
Should this maybe be checking that VT is legal?  Forming a 64 bit op on RV32 or a 32 bit op on RV64 seems slightly suspect.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.h:499
 
-    return TargetLowering::shouldFormOverflowOp(Opcode, VT, MathUsed);
+    // Pass ISD::UADDO to bypass the default behavior disabling ISD::USUBO.
+    return TargetLowering::shouldFormOverflowOp(ISD::UADDO, VT, MathUsed);
----------------
craig.topper wrote:
> reames wrote:
> > Doesn't this also enable multiply as well?  Do we want to?
> You might think that from the name but its never called with ISD::UMULO. I can add an assert?
Yes please.


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  https://reviews.llvm.org/D146835/new/

https://reviews.llvm.org/D146835