[PATCH] D146245: [RISCV] Lower inline asm m with offset to register+imm.

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng accepted this revision.
kito-cheng added a comment.
This revision is now accepted and ready to land.

LGTM, and `m` in GCC has some special treatment for vector types, it will forbid offset, but it's kind of because GCC's implementation, so I am not asking to match this behavior.

That's remind me that we should have document those into riscv-c-api-doc or some where...I has a draft but never finished, I guess I should find some time to create a PR to start the discussion.

  #include <riscv_vector.h>
  int x[100];
  
  int foo(){
      vint32m1_t *a = (vint32m1_t *)&(x[1]); // little bit hack but just used for easier demo the difference
      int y,z;
      asm ("lw %0, %1": "=r"(y) : "m"(*a));
      asm ("lw %0, %1": "=r"(z) : "m"(x[1]));
      return y+z;
  }




Repository:
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https://reviews.llvm.org/D146245