[PATCH] D146245: [RISCV] Lower inline asm m with offset to register+imm.

Alex Bradbury via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 24 06:00:40 PDT 2023


asb added a comment.

I don't feel comfortable approving this because I played a hand in diagnosing the issue and helping Mikhail with the patch. I do think updating our handling of the 'm' constraint to match GCC's is the right thing to do, and this patch achieves it in the simplest way I'm aware of. The logic around asm operand constraints isn't always easy to follow, so it's possible I'm missing alternative ways of achieving the same goal.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146245/new/

https://reviews.llvm.org/D146245



More information about the llvm-commits mailing list