[PATCH] D145572: [llvm][Uniformity] consistently handle uniform instructions

[Sameer Sahasrabuddhe via Phabricator via llvm-commits]

sameerds added a comment.

In D145572#4180441 <https://reviews.llvm.org/D145572#4180441>, @ruiling wrote:

> In D145572#4180384 <https://reviews.llvm.org/D145572#4180384>, @sameerds wrote:
>
>> In D145572#4180375 <https://reviews.llvm.org/D145572#4180375>, @ruiling wrote:
>>
>>> In D145572#4178109 <https://reviews.llvm.org/D145572#4178109>, @ronlieb wrote:
>>>
>>>> LGTM, as this resolves our downstream assertions seen in our CI
>>>
>>> Why would this fix an assertion? The description sounds like this is just an improvement. I think we need a reproducer for the assertion.
>>
>> Please see the comment regarding pushUsers().
>
> Thanks for the point. Another question is does this affect a value defined in a divergent loop but used outside the loop case? For that situation, we still have to say the value is divergent.

I am not sure what your question is:

1. Cycle is assumed to be divergent because it is irreducible. But operations that are always uniform need not be assumed to be divergent. That is this case.
2. Cycle has divergent exit. Value that is always uniform may still be divergent at its used. That is separately handled by temporal divergence.


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