[PATCH] D145383: [RISCV] Support ISD::STRICT_FADD/FSUB/FMUL/FDIV/FMA for scalable vector types.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 6 09:23:19 PST 2023


craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/vfwadd-constrained-sdnode.ll:15
+; CHECK-NEXT:    ret
+  %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>
+  %vd = fpext <vscale x 1 x float> %vb to <vscale x 1 x double>
----------------
Shouldn't these be constrained.fpext?


================
Comment at: llvm/test/CodeGen/RISCV/rvv/vfwadd-constrained-sdnode.ll:17
+  %vd = fpext <vscale x 1 x float> %vb to <vscale x 1 x double>
+  %ve = call <vscale x 1 x double> @llvm.experimental.constrained.fadd.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x double> %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore")
+  ret <vscale x 1 x double> %ve
----------------
Please use `"fpexcept.strict"`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145383/new/

https://reviews.llvm.org/D145383



More information about the llvm-commits mailing list