[PATCH] D145383: [RISCV] Support ISD::STRICT_FADD/FSUB/FMUL/FDIV/FMA for scalable vector types.

[Yeting Kuo via Phabricator via llvm-commits]

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It makes RISC-V serve llvm.experimental.constrained.*.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145383

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfwadd-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfwmacc-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfwmul-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfwsub-constrained-sdnode.ll

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