[PATCH] D145383: [RISCV] Support ISD::STRICT_FADD/FSUB/FMUL/FDIV/FMA for scalable vector types.
Yeting Kuo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 6 17:07:34 PST 2023
fakepaper56 added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/rvv/vfwadd-constrained-sdnode.ll:15
+; CHECK-NEXT: ret
+ %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>
+ %vd = fpext <vscale x 1 x float> %vb to <vscale x 1 x double>
----------------
craig.topper wrote:
> Shouldn't these be constrained.fpext?
I think you are right. I misunderstand it.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D145383/new/
https://reviews.llvm.org/D145383
More information about the llvm-commits
mailing list