[llvm] 740d2f6 - [AArch64] Regenerate rotate.ll test

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-01-10T10:44:32Z
New Revision: 740d2f6b876e9de44b2608554281243a7aba40f5

URL: https://github.com/llvm/llvm-project/commit/740d2f6b876e9de44b2608554281243a7aba40f5
DIFF: https://github.com/llvm/llvm-project/commit/740d2f6b876e9de44b2608554281243a7aba40f5.diff

LOG: [AArch64] Regenerate rotate.ll test

Simplifies diff for D141363

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/rotate.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/rotate.ll b/llvm/test/CodeGen/AArch64/rotate.ll
index 97d20f2a372fe..e57794cf65e13 100644
--- a/llvm/test/CodeGen/AArch64/rotate.ll
+++ b/llvm/test/CodeGen/AArch64/rotate.ll
@@ -1,11 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=aarch64--linux-gnueabihf | FileCheck %s
 
 ;; This used to cause a backend crash about not being able to
 ;; select ROTL. Make sure if generates the basic ushr/shl.
 define <2 x i64> @testcase(ptr %in) {
-; CHECK-LABEL: testcase
-; CHECK: ushr {{v[0-9]+}}.2d
-; CHECK: shl  {{v[0-9]+}}.2d
+; CHECK-LABEL: testcase:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ldr q0, [x0]
+; CHECK-NEXT:    ushr v1.2d, v0.2d, #8
+; CHECK-NEXT:    shl v0.2d, v0.2d, #56
+; CHECK-NEXT:    orr v0.16b, v0.16b, v1.16b
+; CHECK-NEXT:    ret
   %1 = load <2 x i64>, ptr %in
   %2 = lshr <2 x i64> %1, <i64 8, i64 8>
   %3 = shl <2 x i64> %1, <i64 56, i64 56>