[llvm] f21a754 - [AArch64] Add Issue #59898 test case for D141363

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-01-10T10:49:29Z
New Revision: f21a7549151469a5c936a1ef64996bfbd7d2f067

URL: https://github.com/llvm/llvm-project/commit/f21a7549151469a5c936a1ef64996bfbd7d2f067
DIFF: https://github.com/llvm/llvm-project/commit/f21a7549151469a5c936a1ef64996bfbd7d2f067.diff

LOG: [AArch64] Add Issue #59898 test case for D141363

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/rotate.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/rotate.ll b/llvm/test/CodeGen/AArch64/rotate.ll
index e57794cf65e1..c0623f841e54 100644
--- a/llvm/test/CodeGen/AArch64/rotate.ll
+++ b/llvm/test/CodeGen/AArch64/rotate.ll
@@ -17,3 +17,20 @@ define <2 x i64> @testcase(ptr %in) {
   %4 = or <2 x i64> %2, %3
   ret <2 x i64> %4
 }
+
+;; FIXME: This causes miscompile because rot combine
+;; doesn't handle negative shift well.
+define i5 @pr59898(i5 %x) {
+; CHECK-LABEL: pr59898:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    lsr w8, w0, #4
+; CHECK-NEXT:    bfi w8, w0, #1, #31
+; CHECK-NEXT:    mov w0, w8
+; CHECK-NEXT:    ret
+  %r1 = call i5 @llvm.fshr.i5(i5 %x, i5 %x, i5 3)
+  %r2 = call i5 @llvm.fshl.i5(i5 %r1, i5 %r1, i5 2)
+  ret i5 %r2
+}
+
+declare i5 @llvm.fshl.i5(i5, i5, i5)
+declare i5 @llvm.fshr.i5(i5, i5, i5)