[PATCH] D138636: [LSR] Hoist IVInc to loop header if its all uses are in the loop header
chenglin.bi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 10 18:41:01 PST 2023
bcl5980 added a comment.
In D138636#4039899 <https://reviews.llvm.org/D138636#4039899>, @tobiasjs wrote:
> This commit seems to cause a regression in numba tests. The call to TTI.isIndexedLoadLegal(...) calls with type that has TypeID StructTyID, which causes an abort in getValueType because AllowUnknown is false by default.
@tobiasjs , can you help to upload the regression case?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138636/new/
https://reviews.llvm.org/D138636
More information about the llvm-commits
mailing list